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1.2MHz Low-Cost,
High-Performance Chargers
CC Loop Compensation
The simplified schematic in Figure 7 is sufficient to
describe the operation of the controller’s voltage loop,
GM OUT =
1
A CSI × RS 2
(1 + sC OUT × R ESR ) ( 1 + sC CC × R CC )
( 1 + sC CC OGMV OUT L )
× R
)( 1 + sC
× R
CC. The required compensation network is a pole-zero
pair formed with C CC and R CC . The zero is necessary
to compensate the pole formed by the output capacitor
and the load. R ESR is the equivalent series resistance
(ESR) of the charger output capacitor (C OUT ). R L is the
equivalent charger output load, where R L = Δ V BATT /
Δ I CHG . The equivalent output impedance of the GMV
amplifier, R OGMV , is greater than 10M Ω . The voltage-
amplifier transconductance, GMV = 0.125μA/mV. The
DC-DC converter transconductance is dependent upon
charge current-sense resistor RS2:
BATT
GM OUT
R ESR
where A CSI = 20, and RS2 = 10m Ω in the typical appli-
cation circuits, so GM OUT = 5A/V.
The loop transfer function is given by:
LTF = GM OUT × R L × GMV × R OGMV
×
The poles and zeros of the voltage-loop transfer function
are listed from lowest frequency to highest frequency in
Table 2.
Near crossover, C CC is much lower impedance than
R OGMV . Since C CC is in parallel with R OGMV, C CC domi-
nates the parallel impedance near crossover. Additionally,
R CC is much higher impedance than C CC and dominates
the series combination of R CC and C CC , so:
C OUT
R L
R OGMV × (1 + sC CC × R CC )
( 1 + sC CC × R OGMV )
? R CC
CC
GMV
C OUT is also much lower impedance than R L near
crossover so the parallel impedance is mostly capaci-
tive and:
?
R CC
C CC
R OGMV
VCTL
R L 1
( 1 + sC OUT × R L ) sC OUT
Figure 7. CC Loop Diagram
Table 2. CC Loop Poles and Zeros
NAME
EQUATION
DESCRIPTION
CCV Pole
f P _ CV =
1
2 π R OGMV × C CC
Lowest frequency pole created by C CV and GMV’s finite output resistance.
CCV Zero
f Z _ CV =
1
2 π R CC × C CC
Voltage-loop compensation zero. If this zero is at the same frequency or lower
than output pole f P_OUT , the loop-transfer function approximates a single-pole
response near the crossover frequency. Choose C CV to place this zero at
least one decade below crossover to ensure adequate phase margin.
Output
Pole
f P _ OUT =
1
2 π R L × C OUT
Output pole formed with the effective load resistance R L and the output
capacitance C OUT . R L influences the DC gain but does not affect the stability
of the system or the crossover frequency.
Output
Zero
f Z _ OUT =
1
2 π R ESR × C OUT
Output ESR Zero. This zero can keep the loop from crossing unity gain if
f Z_OUT is less than the desired crossover frequency; therefore, choose a
capacitor with an ESR zero greater than the crossover frequency.
______________________________________________________________________________________
17
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